In terms of our introduction to POPs, much of Chapter Five,
Program Execution, is of great interest.
Here are the main sections of this chapter; the sections which we
will discuss are highlighted.
We'll ignore the other sections, as they reference facilities
which our level of MVS does not provide.
Instruction Execution and Sequencing
DAS Authorization Mechanisms
Sequence of Storage References
Normally, operation of the CPU is controlled by instructions
in storage that are executed sequentially, one at a time, left
to right in an ascending sequence of storage addresses.
A change in the sequential operation may be caused by branching,
LOAD PSW, interruptions, SIGNAL PROCESSOR orders, or
We've already alluded to most of the contents of this section in
our Imaginary S/370 Design, so very little of it should be new
in terms of concepts.
The actual S/370 architecture is just a bit more sophisticated than we
described in our Imaginary Design.
I recommend you read the entire section; about all you need to
skip is the brief mention of the Vector Facility which we're ignoring
since it was mainly used for specialized number crunching.
This section also indirectly introduces the notation that POPs uses
when it provides the instruction definitions we will encounter in
later chapters, such as R1 and R2.
Conceptually, the only major addition in terms of instruction
capabilities beyond the Imaginary Design is that of immediate
operands; in the SI instruction format, it simply means that
one of the operands (I2) comes from the instruction itself
rather than a separate storage location.
If you want to get a head start on reading about instructions in POPs,
you could find and skim the Move Immediate (MVI) instruction, which
uses an immediate operand.
This section is just as important as the prior section. It is all
of two pages, and should be studied carefully.
Further instruction definition notations are also introduced here,
such as B, X, and so forth.
INSTRUCTION EXECUTION AND SEQUENCING
Another important section, this time dealing with branching.
Beginning assembler programmers can safely ignore mention of the
MONITOR CALL, PROGRAM CALL, and PROGRAM TRANSFER instructions.
Once you get to the Interruptions section, read all three paragraphs
and then you can skim beginning with Types of Instruction Ending through
the end of the section.
DAS Authorization Mechanisms
My advice is that beginning assembler programmers skip these sections
Sadly, our level of MVS doesn't directly support any of them.
SEQUENCE OF STORAGE REFERENCES
Since we're restricting ourselves to only one CPU, not much of
this section has meaning until we get to the I/O chapter.
The Conceptual Sequence subsection is worthy of note, as are
the Instruction Fetching and Storage-Key Accesses subsections and
I recommend you review them as best you can.
As your mental model of the S/370 architecture improves, you'll
want to return to this chapter and particularly this section.
This section is more advanced material, again having mostly to
do with multiprocessor systems. Beginning assembly programmers
can safely skip this section, although you might find that skimming
it is interesting.